当前课程知识点：数字集成电路分析与设计 > Coping with Interconnect > 1. Introduction > Video
Hello, ladies and gentlemen, boys and girls,
today we move to our final topic,
how to cope with interconnect.
We are going to talk about the capacitive
parasitics as well as resistive parasitics.
So from the global point of view,
the impact of interconnect parasitics consists of two components,
the first one, the how to,
it will affect the performance such as increasing delay
or increasing the power dissipation or energy dissipation.
The other one is reducing the robustness,
and I would like to introduce the capacitive and resistive
things and skip the inductive things,
because this is out of the scope of this lecture.
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-1.Introduction to Digital IC
--Video
-2.Architecture of Digital Processor
--Video
-3.Full Custom Design Methodology
--Video
-4.Semicustom Design Methodology
--Video
-5.Quality Metric of Digital IC
--Video
-6.Summary and Textbook Reference
--Video
-7.HW--作业
-7.PPT
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-Key Points Review of Last Lecture
--Video
-1.Introduction
--Video
-2.The Diode
--Video
-3.The MOSFET Transistor
--Video
-4.Secondary Effects
--Video
-5.Summary and Textbook Reference
--Video
-6.HW--作业
-6.PPT
--补充材料
-Key Points Review of Last Lecture
--Video
-1.Introduction
--Video
-2.Static Behavior
--Video
-3.HW--作业
-3.PPT
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-Key Points Review of Last Lecture
--Video
-1.Dynamic Behavior I
--Video
-2.Dynamic Behavior II
--Video
-3.Power Dissipation
--Video
-4. Summary and Textbook Reference
--Video
-5.HW--作业
-5.PPT
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-1.Introduction
--Video
-2.Static CMOS Design I
--Video
-3.Static CMOS Design II
--Video
-4.HW--作业
-4.PPT
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-Key Points Review of Last Lecture
--Video
-1.Static CMOS Design III
--Video
-2.Static CMOS Design IV
--Video
-3.Dynamic CMOS Design
--Video
-4.Summary
--Video
-5.HW--作业
-5.PPT
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-1.Introduction I
--Video
-2.Introduction II
--Video
-3. Static Latches and Registers I
--Video
-4.Static Latches and Registers II
--Video
-5.Static Latches and Registers III
--Video
-6.HW--作业
-6.PPT
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-1.Key Points Review
--Video
-2.Dynamic Latches and Registers I
--Video
-3.Dynamic Latches and Registers II
--Video
-4.Dynamic Latches and Registers III
--Video
-5.Pulse Register
--Video
-6.Pipelining
--Video
-7.Schmitt Trigger
--Video
-8.Summary and Textbook Reference
--Video
-9.HW--作业
-9.PPT
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-1. Introduction
--Video
-2. Adder: Full Adder (Definition)
--Video
-3. Adder: Circuit Design
--Video
-4. Adder: Logic Design I
--Video
-5. Adder: Logic Design II
--Video
-6. Adder: Summary
--Video
-7.HW--作业
-7.PPT
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-1. Key Points Review
--Video
-2. Multiplier
--Video
-3. Shifter
--Video
-4. Summary and Textbook Reference
--Video
-5. HW--作业
-5. PPT
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-1. Introduction
--Video
-2. Capacitance
--Video
-3. Resistance
--Video
-4. Electrical Wire Models
--Video
-5. Summary and Textbook Reference
--Video
-6. HW--作业
-6. PPT
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-1. Introduction
--Video
-2. Capacitive Parasitics
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-3. Capacitive Parasitics II
--Video
-4. Resistive Parasitics
--Video
-5. Summary and Textbook Reference
--Video
-6. HW--作业
-6. PPT
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-1. Assignment Solving
--Video
-2. The teaching assistants want to say
--Video
-1. Problem 1
--Video
-2. Problem 2
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-3. Problem 3
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-4. Problem 4
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-5. Problem 5
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-6. Problem 6
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-7. Problem 7
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-1. Problem 8
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-2. Problem 9
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-3. Problem 10
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-4. Problem 11
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-5. Problem 12
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-6. Problem 13
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-7. Problem 14
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